Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11014883
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Filing Dt:
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12/20/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Inventors:
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Seiichi Kondo, Kaori Misawa
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Title:
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Multilayered wiring structure, method of forming buried wiring, semiconductor device, method of manufacturing semiconductor device, semiconductor mounted device, and method of manufacturing semiconductor mounted device
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 16-1 ONOGAWA |
| TSUKUBA-SHI, IBARAKI, JAPAN 305-8569 |
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| JEFFREY A. WYANG |
| LEYDIG, VOIT & MAYER |
| 700 THIRTEENTH ST., NW |
| SUITE 300 |
| WASHINGTON, D.C. 20005-3960 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2-4-1 MARUNOUCHI |
| CHIYODA-KU |
| TOKYO, JAPAN 100-6334 |
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| JEFFREY A. WYAND |
| 700 THIRTEENTH STREET, N. W. |
| SUITE 300 |
| WASHINGTON, DC 20005 |
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