Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10797972
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Filing Dt:
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03/10/2004
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Publication #:
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Pub Dt:
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09/15/2005
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Inventor:
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Yi Ding
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Title:
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FABRICATION OF CONDUCTIVE LINES INTERCONNECTING FIRST CONDUCTIVE GATES IN NONVOLATILE MEMORIES HAVING SECOND CONDUCTIVE GATES PROVIDED BY CONDUCTIVE GATE LINES, WHEREIN THE ADJACENT CONDUCTIVE GATE LINES FOR THE ADJACENT COLUMNS ARE SPACED FROM EACH OTHER, AND NON-
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 3F, NO. 19, LI-HSIN ROAD, SCIENCE-BASED INDUSTRIAL PARK |
| HSIN CHU CITY, TAIWAN |
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| MACPHERSON, KWOK CHEN & HEID LLP |
| MICHAEL SHENKER |
| 1762 TECHNOLOGY DRIVE, SUITE 226 |
| SAN JOSE, CA 95110 |
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