Patent Assignment Abstract of Title
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Total Assignments:
4
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10968110
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Filing Dt:
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10/20/2004
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Publication #:
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Pub Dt:
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01/05/2006
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Inventor:
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Kazutaka Takeuchi
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Title:
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METHOD AND DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT AND LOGIC DESIGN PROGRAM
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA, 4-CHOME, NAKAHARA-KU |
| KAWASAKI-SHI, KANAGAWA, JAPAN 211-8588 |
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| STAAS & HALSEY LLP |
| DAVID M. PITCHER |
| 1201 NEW YORK AVENUE, N.W. |
| SUITE 700 |
| WASHINGTON, DC 20005 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-1, NISHI-SHINJUKU 2-CHOME |
| SHINJUKU-KU, TOKYO 163-0722, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: H. J. STAAS |
| 1201 NEW YORK AVE., N.W., 7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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Assignment:
3
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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| 2-10-23 SHIN-YOKOHAMA |
| KOHOKU-KU, YOKOHAMA-SHI |
| KANAGAWA 222-0033, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: PAUL I. KRAVETZ |
| 1201 NEW YORK AVE., N.W., 7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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Assignment:
4
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2-10-23 SHIN-YOKOHAMA, KOHOKU-KU |
| YOKOHAMA-SHI, KANAGAWA, JAPAN 222-0033 |
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| ARENT FOX LLP |
| 1717 K STREET, N.W. |
| WASHINGTON, DC 20006 |
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