Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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11249515
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Filing Dt:
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10/14/2005
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Publication #:
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Pub Dt:
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04/27/2006
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Inventors:
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In-Joon Yeo, Won-Jun Lee, Tae-Hyun Kim, Ji-Hong Kim, Byoung-Moon Yoon
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING VOIDS IN A POLYSILICON LAYER
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 416 MAETAN-DONG, YEONGTONG-GU |
| SUWON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF |
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| JOHN A. CASTELLANO |
| HARNESS, DICKEY & PIERCE, P.L.C. |
| P.O. BOX 8910 |
| RESTON, VA 20195 |
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