Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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02/17/2009
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Application #:
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11091498
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Filing Dt:
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03/29/2005
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Publication #:
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Pub Dt:
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06/22/2006
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Inventor:
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Yoichiro Ishikawa
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Title:
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METHOD FOR THE GENERATION OF STATIC NOISE CHECK DATA IN THE LAYOUT HIERARCHICAL DESIGN OF AN LSI
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA 4-CHOME |
| NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA 211-8588, JAPAN |
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| WESTERMAN, HATTORI, DANIELS & ADRIAN, LL |
| 1250 CONNECTICUT AVENUE, NW |
| SUITE 700 |
| WASHINGTON, DC 20036 |
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