Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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11089108
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Filing Dt:
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03/24/2005
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Publication #:
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Pub Dt:
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09/28/2006
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Inventors:
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Chia-Lin Cheng, EJ Wu, Shih-Cheng Chang, Kuo-Yin Chen
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Title:
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METHOD FOR INTEGRALLY CHECKING CHIP AND PACKAGE SUBSTRATE LAYOUTS FOR ERRORS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NO. 8, LI-HSIN ROAD 6 |
| SCIENCE BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 R.O.C. |
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| STEVEN E. KOFFS, ESQUIRE |
| DUANE MORRIS LLP |
| ONE LIBERTY PLACE |
| PHILADELPHIA, PA 19103 |
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