Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11095938
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Filing Dt:
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03/30/2005
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Publication #:
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Pub Dt:
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10/12/2006
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Inventors:
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Bin Wang, Todd E. Humes
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Title:
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Dual transistor NVM cell with retention-enhanced programmable shared gate logic circuit
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 501 N. 34TH STREET |
| SUITE 100 |
| SEATTLE, WASHINGTON 98103 |
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| MERCHANT & GOULD PC |
| P.O. BOX 2903 |
| MINNEAPOLIS, MN 55402-0903 |
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Assignment:
2
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RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
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| 251 PARK AVE SOUTH |
| 7TH FLOOR |
| NEW YORK, NEW YORK 10010 |
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| PACIFIC WESTERN BANK |
| 555 S. MANGUM STREET |
| SUITE 1000 |
| DURHAM, NC 27701 |
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