Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11404899
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Filing Dt:
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04/17/2006
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Publication #:
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Pub Dt:
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10/19/2006
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Inventors:
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Kan Yasui, Shinichiro Kimura, Digh Hisamoto, Tetsuya Ishimaru
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Title:
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Method of fabricating nonvolatile semiconductor memory devices with uniform sidewall gate length
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 4-1 MARUNOUCHI 2-CHOME, CHIYODA-KU |
| TOKYO 100-6334, JAPAN |
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| MATTINGLY, STANGER, MALUR |
| & BRUNDIDGE, P.C. |
| 1800 DIAGONAL ROAD, SUITE 370 |
| ALEXANDRIA, VIRGINIA 22314 |
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Assignment:
2
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MERGER AND CHANGE OF NAME
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| 1753, SHIMONUMABE, NAKAHARA-KU |
| KAWASAKI-SHI, KANAGAWA, JAPAN 211-8668 |
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| MATTINGLY & MALUR, P.C. |
| 1800 DIAGONAL RD. |
| SUITE 370 |
| ALEXANDRIA, VA 22314 |
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