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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
11424995
Filing Dt:
06/19/2006
Publication #:
Pub Dt:
12/28/2006
Inventors:
Woong hee Sohn, Gil-heyun Choi, Chang-won Lee, Tae-ho Cha, Byung-hee Kim
Title:
Methods of Forming Integrated Circuit Devices Including Memory Cell Gates and High Voltage Transistor Gates Using Plasma Re-Oxidation
Assignment: 1
Reel/Frame:
017807/0901Recorded: 06/19/2006Pages: 8
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
05/26/2006
Exec Dt:
05/26/2006
Exec Dt:
05/26/2006
Exec Dt:
05/26/2006
Exec Dt:
06/05/2006
Assignee:
416 MAETAN-DONG, YEONGTONG-GU
SUWON-SI
GYEONGGI-DO, KOREA, REPUBLIC OF
Correspondent:
MYERS BIGEL SIBLEY & SAJOVEC PA
4140 PARKLAKE AVENUE
SUITE 600
RALEIGH, NC 27612

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