Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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03/25/2008
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Application #:
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11177537
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Filing Dt:
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07/08/2005
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Publication #:
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Pub Dt:
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01/11/2007
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Inventors:
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Jon Allan Faue, Steve Eaton, Michael Murray
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Title:
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TWO-BIT PER I/O LINE WRITE DATA BUS FOR DDR1 AND DDR2 OPERATING MODES IN A DRAM
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 3F, NO. 19, LI-HSIN ROAD |
| SCIENCE-BASED INDUSTRIAL PARK |
| HSINCHU, TAIWAN R.O.C. |
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| WILLIAM J. KUBIDA |
| HOGAN & HARTSON LLP |
| ONE TABOR CENTER |
| 1200 17TH STREET, SUITE 1500 |
| DENVER, CO 80202 |
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