Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11217023
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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03/01/2007
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Inventor:
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Gary J. Verdun
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Title:
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Method and system for managing cacheability of data blocks to improve processor power management
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| ONE DELL WAY |
| ROUND ROCK, TEXAS 78682 |
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| BRIAN W. PETERMAN |
| 1101 S. CAPITAL OF TEXAS HIGHWAY |
| BUILDING C, SUITE 200 |
| AUSTIN, TEXAS 78746 |
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