Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10558269
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Filing Dt:
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10/12/2006
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Publication #:
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Pub Dt:
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05/03/2007
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Inventors:
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Tomotoshi Satoh, Yoshihiko Nemoto, Kenji Takahashi, Yukiharu Akiyama
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Title:
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Stackable Semiconductor Chip, Stacked Semiconductor Chip Module, and Assembling, Identification and Module Environment Setting Methods Therefor
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 22-22, NAGAIKE-CHO, ABENO-KU, OSAKA-SHI |
| OSAKA, JAPAN 545-8522 |
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| 4-1, MARUNOUCHI 2-CHOME, CHIYODA-KU |
| TOKYO, JAPAN 100-6334 |
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| 1-1, SHIBAURA 1-CHOME |
| CHIYODA-KU, TOKYO, JAPAN 100-6334 |
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| H. WARREN BURNAM, JR. |
| NIXON & VANDERHYE P.C. |
| 901 NORTH GLEBE ROAD |
| 11TH FLOOR |
| ARLINGTON, VA 22203 |
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Assignment:
2
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CORRECTIVE ASSIGNMENT TO CORRECT THE THIRD ASSIGNEE'S ADDRESS, PREVIOUSLY RECORDED AT REEL 018440 FRAME 0157.
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| 22-22, KAGAIKE-CHO, ABENO-KU, OSAKA-SHI |
| OSAKA, JAPAN 545-8522 |
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| 4-1, MARUNOUCHI 2-CHOME, CHIYODA-KU |
| TOKYO, JAPAN 100-6334 |
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| 1-1, SHIBAURA 1-CHOME |
| MINATO-KU, JAPAN 105-8001 |
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| H. WARREN BURNAM, JR. |
| NIXON & VANDERHYE P.C. |
| 901 NORTH GLEBE ROAD |
| 11TH FLOOR |
| ARLINGTON, VA 22203 |
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