Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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11546955
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Filing Dt:
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10/13/2006
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Publication #:
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Pub Dt:
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05/03/2007
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Inventors:
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Makoto Hirota, Hidekazu Kikuchi
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT AND LEAK CURRENT REDUCING METHOD
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-12, TORANOMON 1-CHOME |
| MINATO-KU, TOKYO, JAPAN 105-8460 |
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| DONALD R. STUDEBAKER |
| NIXON PEABODY LLP |
| SUITE 900 |
| 401 9TH STREET, N.W. |
| WASHINGTON, D.C. 20004-2128 |
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Assignment:
2
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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| 550-1 HIGASHIASAKAWA-CHO |
| HACHIOJI-SHI, TOKYO, JAPAN 193-8550 |
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| KUBOTERA & ASSOCIATES, LLC |
| 200 DAINGERFIELD ROAD, SUITE 202 |
| ALEXANDRIA, VA 22314 |
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