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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
02/03/2009
Application #:
11438052
Filing Dt:
05/18/2006
Publication #:
Pub Dt:
11/22/2007
Inventors:
James Andrew Garrard Seawright, Jeremy Rutledge Levitt, Christophe Gauthron
Title:
CLOCK MODEL FOR FORMAL VERIFICATION OF A DIGITAL CIRCUIT DESCRIPTION
Assignment: 1
Reel/Frame:
017922/0782Recorded: 05/18/2006Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
05/10/2006
Exec Dt:
05/11/2006
Exec Dt:
05/11/2006
Assignee:
8005 SW BOECKMAN DRIVE
WILSONVILLE, OREGON 97070-7777
Correspondent:
CHARLES J. KULAS
1900 EMBARCADERO ROAD
SUITE 109
PALO ALTO, CA 94303-3310
Assignment: 2
Reel/Frame:
056597/0234Recorded: 06/16/2021Pages: 7
Conveyance:
MERGER AND CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
12/30/2020
Newly Merged Entity Data
Exec Dt:
12/30/2020
Newly Merged Entity's New Name:
5800 GRANITE PARKWAY, SUITE 600
PLANO, TEXAS 75024
Correspondent:
SIEMENS CORPORATION IP DEPT - MAIL CODE INT-244
3850 QUADRANGLE BOULEVARD
ORLANDO, FL 32817

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