Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11798165
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Filing Dt:
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05/10/2007
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Publication #:
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Pub Dt:
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12/13/2007
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Inventor:
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Masato Inoue
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Title:
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METHOD OF DESIGNING AND MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING MASTER SLICE METHOD
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA 4-CHOME NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA 211-8588, JAPAN |
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| STAAS & HASLEY LLP |
| ATTN: WILLIAM F. HERBERT |
| 1201 NEW YORK AVENUE, N.W., SUITE 700 |
| WASHINGTON, D.C. 20005 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-1, NISHI-SHINJUKU 2-CHOME |
| SHINJUKU-KU, TOKYO 163-0722, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: H. J. STAAS |
| 1201 NEW YORK AVE., N.W., 7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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Assignment:
3
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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| 2-10-23 SHIN-YOKOHAMA |
| KOHOKU-KU, YOKOHAMA-SHI |
| KANAGAWA 222-0033, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: PAUL I. KRAVETZ |
| 1201 NEW YORK AVE., N.W., 7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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