Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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10/13/2009
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Application #:
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10579766
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Filing Dt:
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05/18/2006
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Publication #:
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Pub Dt:
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05/01/2008
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Inventor:
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Takamitsu Yamada
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Title:
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ASSERTION GENERATING SYSTEM, PROGRAM THEREOF, CIRCUIT VERIFYING SYSTEM, AND ASSERTION GENERATING METHOD
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 3-6, NAKAMAGOME 1-CHOME, OHTA-KU |
| TOKYO, JAPAN 143-8555 |
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| MARK J. THRONSON |
| DICKSTEIN SHAPIRO MORIN & OSHINSKY LLP |
| 2101 L STREET NW |
| WASHINGTON, DC 20037-1526 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1000 N. WEST STREET |
| SUITE 1200 |
| WILMINGTON, DELAWARE 19801 |
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| SZYMON GURDA |
| 903 COMMERCE DRIVE |
| SUITE 310 |
| OAK BROOK, IL 60523 |
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