Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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11586879
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Filing Dt:
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10/25/2006
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Publication #:
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Pub Dt:
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05/29/2008
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Inventors:
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Manish Pandey, Rajat Arora, Chih-Chang Lin, Huan-Chih Tsai, Bharat Chandramouli et al
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Title:
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METHOD AND SYSTEM FOR EQUIVALENCE CHECKING OF A LOW POWER DESIGN
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2655 SEELY AVENUE, BUILDING 5 |
| SAN JOSE, CALIFORNIA 95134 |
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| MORRISON & FOERSTER LLP |
| 755 PAGE MILL ROAD |
| PALO ALTO, CA 94304-1018 |
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