Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11958615
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Filing Dt:
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12/18/2007
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Publication #:
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Pub Dt:
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06/19/2008
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Inventors:
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Keiji IKEDA, Toshihiko MIYASHITA
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Title:
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MOS TRANSISTOR, METHOD FOR MANUFACTURING THE MOS TRANSISTOR, CMOS SEMICONDUCTOR DEVICE INCLUDING THE MOS TRANSISTOR, AND SEMICONDUCTOR DEVICE INCLUDING THE CMOS SEMICONDUCTOR DEVICE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, |
| KAWASAKI-SHI, KANAGAWA, JAPAN 211-8588 |
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| WESTERMAN, HATTORI, DANIELS & ADRIAN LLP |
| 1250 CONNECTICUT AVENUE NW, |
| SUITE 700 |
| WASHINGTON,, DC 20036 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-1, NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU |
| TOKYO, JAPAN 163-0722 |
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| WESTERMAN, HATTORI, DANIELS & ADRIAN, LL |
| 1250 CONNECTICUT AVENUE, NW |
| SUITE-700 |
| WASHINGTON, DC 20036-2657 |
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