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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
NONE
Issue Dt:
Application #:
11526820
Filing Dt:
09/26/2006
Publication #:
20080250383
Pub Dt:
10/09/2008
Inventors:
Toshihiko Tanaka, Tsuneo Terasawa, Nobuyuki Yoshioka, Tetsuya Higuchi et al
Title:
Method for designing mask pattern and method for manufacturing semiconductor device
Assignment: 1
Reel/Frame:
018811/0899Recorded: 01/18/2007Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
TANAKA, TOSHIHIKO
Exec Dt:
09/14/2006
TERASAWA, TSUNEO
Exec Dt:
09/14/2006
YOSHIOKA, NOBUYUKI
Exec Dt:
09/28/2006
HIGUCHI, TETSUYA
Exec Dt:
09/14/2006
SAKANASHI, HIDENORI
Exec Dt:
09/14/2006
NOSATO, HIROKAZU
Exec Dt:
09/21/2006
MURAKAWA, MASAHIRO
Exec Dt:
09/14/2006
Assignees:
RENESAS TECHNOLOGY CORP.
4-1, MARUNOUCHI 2-CHOME
CHIYODA-KU, TOKYO 100-6334, JAPAN
NATIONAL INSTUTUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
3-1 KASUMIGASEKI 1-CHOME
CHIYODA-KU, TOKYO 100-8921, JAPAN
Correspondent:
STANLEY P. FISHER
REED SMITH LLP
3110 FAIRVIEW PARK DR.
SUITE 1400
FALLS CHURCH, VA 22042
Assignment: 2
Reel/Frame:
018915/0595Recorded: 02/09/2007Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
TANAKA, TOSHIHIKO
Exec Dt:
09/14/2006
TERASAWA, TSUNEO
Exec Dt:
09/14/2006
YOSHIOKA, NOBUYUKI
Exec Dt:
09/28/2006
HIGUCHI, TETSUYA
Exec Dt:
09/14/2006
SAKANASHI, HIDENORI
Exec Dt:
09/14/2006
NOSATO, HIROKAZU
Exec Dt:
09/21/2006
MURAKAWA, MASAHIRO
Exec Dt:
09/14/2006
Assignees:
RENESAS TECHNOLOGY CORP.
4-1, MARUNOUCHI 2-CHOME
CHIYODA-KU, TOKYO 100-6334, JAPAN
NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
3-1 KASUMIGASEKI 1-CHOME
CHIYODA-KU, TOKYO 100-8921, JAPAN
Correspondent:
STANLEY P. FISHER
REED SMITH LLP
3110 FAIRVIEW PARK DR.
SUITE 1400
FALLS CHURCH, VA 22042

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