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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
03/02/2010
Application #:
12107274
Filing Dt:
04/22/2008
Publication #:
Pub Dt:
10/30/2008
Inventors:
Ashutosh Tiwari, Subrangshu Kumar Das
Title:
METHOD TO HIDE OR REDUCE ACCESS LATENCY OF A SLOW PERIPHERAL IN A PIPELINED DIRECT MEMORY ACCESS SYSTEM
Assignment: 1
Reel/Frame:
021162/0963Recorded: 06/27/2008Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
06/17/2008
Exec Dt:
06/17/2008
Assignee:
7839 CHURCHILL WAY
MS 3999
DALLAS, TEXAS 75251
Correspondent:
TEXAS INSTRUMENTS INCORPORATED
P O BOX 655474, M/S 3999
DALLAS, TX 75265

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