Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11899644
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Filing Dt:
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09/06/2007
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Publication #:
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Pub Dt:
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03/12/2009
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Inventors:
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Arup Bhattacharyya, Garo Derderian
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Title:
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Thin gate stack structure for memory cells and methods for forming the same
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 8000 SOUTH FEDERAL WAY |
| P.O. BOX 6/83707-0006 |
| BOISE, IDAHO 83716-9632 |
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| DORSEY & WHITNEY LLP |
| EDWARDS W. BULCHIS |
| SUITE 3400 |
| 1420 FIFTH AVENUE |
| SEATTLE, WA 98101 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 8000 SOUTH FEDERAL WAY |
| P.O. BOX 6 / 83707-0006 |
| BOISE, IDAHO 83716-9632 |
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| DORSEY & WHITNEY LLP |
| 1420 FIFTH AVENUE |
| SUITE 3400 |
| SEATTLE, WA 98101 |
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