Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
1
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2011
|
Application #:
|
12424922
|
Filing Dt:
|
04/16/2009
|
|
Publication #:
|
|
Pub Dt:
|
12/31/2009
| | | | |
|
Inventors:
|
Byung-hee Kim, Gil-heyun Choi, Sang-woo Lee, Jin-ho Park, Eun-ji Jung, Jeong-gil Lee et al
|
|
Title:
|
METHODS OF FORMING INTEGRATED CIRCUIT DEVICES HAVING STACKED GATE ELECTRODES
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| 416 MAETAN-DONG, YEONGTONG-GU |
| SUWON-SI |
| GYEONGGI-DO, KOREA, REPUBLIC OF |
|
|
|
|
| MYERS BIGEL SIBLEY & SAJOVEC |
| PO BOX 37428 |
| RALEIGH, NC 27627 |
|
|
Search Results as of:
05/10/2024 12:14 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
