Patent Assignment Abstract of Title
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Total Assignments:
4
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Patent #:
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Issue Dt:
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06/03/2014
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Application #:
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12544810
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Filing Dt:
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08/20/2009
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Publication #:
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Pub Dt:
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03/25/2010
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Inventor:
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Toshihiko Miyashita
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Title:
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A MANUFACTURING METHOD OF A MOS TRANSISTOR USING A SIDEWALL SPACER
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1-1, KAMIKODANAKA 4-CHOME |
KAWASAKI-SHI, KANAGAWA, JAPAN 211-8588 |
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WESTERMAN, HATTORI, DANIELS & ADRIAN LLP |
1250 CONNECTICUT AVENUE NW, |
SUITE 700 |
WASHINGTON,, DC 20036 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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2-10-23 SHIN-YOKOHAMA, KOHOKU-KU |
YOKOHAMA-SHI, KANAGAWA, JAPAN 222-0033 |
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WESTERMAN, HATTORI, DANIELS & ADRIAN, LL |
1250 CONNECTICUT AVENUE, NW |
SUITE-700 |
WASHINGTON, DC 20036-2657 |
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Assignment:
3
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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2-10-23 SHIN-YOKOHAMA KOHOKU-KU |
YOKOHAMA-SHI, KANAGAWA, JAPAN 222-0033 |
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WESTERMAN, HATTORI, DANIELS & ADRIAN, LL |
1250 CONNECTICUT AVENUE, NW |
SUITE-700 |
WASHINGTON, DC 20036-2657 |
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Assignment:
4
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2-100-45 SHIN-YOKOHAMA, KOHOKU-KU |
YOKOHAMA-SHI, KANAGAWA, JAPAN 222-0033 |
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WESTERMAN, HATTORI, DANIELS AND ADRIAN |
1250 CONNECTICUT AVENUE, NW |
SUITE 700 |
WASHINGTON, DC 20036 |
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