Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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02/21/2012
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Application #:
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12498528
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Filing Dt:
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07/07/2009
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Publication #:
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Pub Dt:
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05/06/2010
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Inventors:
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Kong-Soo Lee, Kyoung-Seok Kim, Jae-Hyun Park, Jae-Hee Oh, Sang-Jin Park, Ji-Hyun Jeong et al
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Title:
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METHODS OF FORMING INTEGRATED CIRCUIT DEVICES HAVING VERTICAL SEMICONDUCTOR INTERCONNECTS AND DIODES THEREIN AND DEVICES FORMED THEREBY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 416 MAETAN-DONG, YEONGTONG-GU |
| SUWON-SI |
| GYEONGGI-DO, KOREA, REPUBLIC OF |
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| MYERS BIGEL SIBLEY & SAJOVEC |
| PO BOX 37428 |
| RALEIGH, NC 27627 |
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