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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
06/28/2011
Application #:
12320884
Filing Dt:
02/06/2009
Publication #:
Pub Dt:
08/12/2010
Inventors:
Yoshitaka Sasaki, Hiroyuki Ito, Hiroshi Ikejima, Satoru Sueki, Nobuyuki Okuzawa et al
Title:
LAYERED CHIP PACKAGE WITH WIRING ON THE SIDE SURFACES
Assignment: 1
Reel/Frame:
022495/0422Recorded: 04/08/2009Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
03/27/2009
Exec Dt:
03/27/2009
Exec Dt:
03/19/2009
Exec Dt:
03/19/2009
Exec Dt:
03/19/2009
Exec Dt:
03/23/2009
Assignees:
678 S. HILLVIEW DR.
MILPITAS, CALIFORNIA 95035
1-13-1, NIHONBASHI, CHUO-KU
TOKYO, JAPAN 103-8272
SAE TECHNOLOGY CENTRE
6 SCIENCE PARK EAST AVENUE HONG KONG SCIENCE PARK
SHATIN, N.T. HONG KONG, CHINA
Correspondent:
JAMES A. OLIFF
OLIFF & BERRIDGE, PLC
P.O. BOX 320850
ALEXANDRIA, VA 22320-4850

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