Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/11/2012
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Application #:
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12903782
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Filing Dt:
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10/13/2010
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Publication #:
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Pub Dt:
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04/14/2011
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Inventors:
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Brent A. MYERS, James G. Fox
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Title:
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HIGH UTILIZATION UNIVERSAL LOGIC ARRAY WITH VARIABLE CIRCUIT TOPOLOGY AND LOGISTIC MAP CIRCUIT TO REALIZE A VARIETY OF LOGIC GATES WITH CONSTANT POWER SIGNATURES
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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101 SE 2ND PLACE |
GAINESVILLE, FLORIDA 32601 |
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FLEIT GIBBONS GUTMAN BONGINI & BIANCO P. |
ONE BOCA COMMERCE CENTER |
551 NORTHWEST 77TH STREET, SUITE 111 |
BOCA RATON, FL 33487 |
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