Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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05/06/2014
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Application #:
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13393216
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Filing Dt:
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02/28/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Inventor:
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Thomas Vogelsang
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Title:
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SEMICONDUCTOR MEMORY DEVICE WITH HIERARCHICAL BITLINES
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1050 ENTERPRISE WAY, SUITE 700 |
| SUNNYVALE, CALIFORNIA 94089 |
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| JAE WON SONG |
| 801 CALIFORNIA STREET |
| FENWICK & WEST LLP |
| MOUNTAIN VIEW, CA 94041 |
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Assignment:
2
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MERGER (SEE DOCUMENT FOR DETAILS).
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| 3141 CHESTNUT STREET |
| PHILADELPHIA, PENNSYLVANIA 19104 |
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| BAKER & HOSTETLER LLP |
| 2929 ARCH STREET |
| 12TH FLOOR, CIRA CENTRE |
| PHILADELPHIA, PA 19104 |
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