Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13725163
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Filing Dt:
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12/21/2012
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Publication #:
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Pub Dt:
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05/30/2013
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Inventors:
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Mitsuo TANAKA, Tsuneichiro SANO, Osamu MATSUI
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Title:
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BIPOLAR TRANSISTOR WITH DIFFUSED LAYER BETWEEN DEEP TRENCH SIDEWALL AND COLLECTOR DIFFUSED LAYER
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1006, OAZA KADOMA, KADOMA-SHI |
| OSAKA, JAPAN 571-8501 |
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| PANASONIC CORPORATION |
| 2-1-61, SHIROMI, CHUO-KU |
| 7F OBP PANASONIC TOWER |
| OSAKA, 540-6207 JAPAN |
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