Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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06/24/2014
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Application #:
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14046339
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Filing Dt:
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10/04/2013
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Publication #:
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Pub Dt:
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03/06/2014
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Inventors:
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Naoto UMEZAWA, Toyohiro CHIKYO, Toshihide NABATAME
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Title:
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METHOD FOR REDUCING THICKNESS OF INTERFACIAL LAYER, METHOD FOR FORMING HIGH DIELECTRIC CONSTANT GATE INSULATING FILM, HIGH DIELECTRIC CONSTANT GATE INSULATING FILM, HIGH DIELECTRIC CONSTANT GATE OXIDE FILM, AND TRANSISTOR HAVING HIGH DIELECTRIC CONSTANT GATE OXIDE FILM
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Assignment:
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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2-1, SENGEN 1-CHOME, TSUKUBA-SHI |
IBARAKI, JAPAN 305-0047 |
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JOHN L. CORDANI |
50 LEAVENWORTH STREET |
P.O. BOX 1110 |
WATERBURY, CT 06721-1110 |
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