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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
9153478
Issue Dt:
10/06/2015
Application #:
14081345
Filing Dt:
11/15/2013
Publication #:
20140273442
Pub Dt:
09/18/2014
Inventors:
Ru-Gun Liu, Shih-Ming Chang, Ken-Hsien Hsieh, Ming-Feng Shieh, Chih-Ming Lai et al
Title:
SPACER ETCHING PROCESS FOR INTEGRATED CIRCUIT DESIGN
Assignment: 1
Reel/Frame:
031612/0594Recorded: 11/15/2013Pages: 7
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
LIU, RU-GUN
Exec Dt:
10/18/2013
CHANG, SHIH-MING
Exec Dt:
10/18/2013
HSIEH, KEN-HSIEN
Exec Dt:
10/18/2013
SHIEH, MING-FENG
Exec Dt:
10/21/2013
LAI, CHIH-MING
Exec Dt:
10/21/2013
GAU, TSAI-SHENG
Exec Dt:
10/24/2013
LEE, CHIA-YING
Exec Dt:
10/22/2013
SHIEH, JYU-HORNG
Exec Dt:
10/22/2013
LEE, CHUNG-JU
Exec Dt:
10/24/2013
TSAI, CHENG-HSIUNG
Exec Dt:
10/23/2013
BAO, TIEN-I
Exec Dt:
10/22/2013
SHUE, SHAU-LIN
Exec Dt:
10/22/2013
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK
HSIN-CHU, TAIWAN 300-77
Correspondent:
HAYNES AND BOONE, LLP IP SECTION
2323 VICTORY AVENUE
SUITE 700
DALLAS, TX 75219

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