Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/01/2015
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Application #:
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13968804
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Filing Dt:
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08/16/2013
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Publication #:
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Pub Dt:
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02/19/2015
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Inventors:
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Jyu-Horng Shieh, Chia-Ying Lee
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Title:
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METHOD OF FINE LINE SPACE RESOLUTION LITHOGRAPHY FOR INTEGRATED CIRCUIT FEATURES USING DOUBLE PATTERNING TECHNOLOGY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NO. 8, LI-HSIN RD. 6 |
| SCIENCE-BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 R.O.C. |
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| SLATER & MATSIL, L.L.P. |
| 17950 PRESTON ROAD |
| SUITE 1000 |
| DALLAS, TX 75252 |
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