Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/20/2016
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Application #:
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14166003
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Filing Dt:
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01/28/2014
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Publication #:
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Pub Dt:
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07/30/2015
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Inventors:
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Harsh Rawat, Piyush Jain, Gangaikondan Subramani Visweswaran
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Title:
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CACHE MEMORY SYSTEM WITH SIMULTANEOUS READ-WRITE IN SINGLE CYCLE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| WTC SCHIPHOL AIRPORT, SCHIPHOL BOULEVARD 265 |
| AMSTERDAM, NETHERLANDS 1118BH |
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| GARDERE WYNNE SEWELL LLP IP SECTION |
| 1601 ELM STREET, SUITE 3000 |
| DALLAS, TX 75201 |
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