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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
9658783
Issue Dt:
05/23/2017
Application #:
14759504
Filing Dt:
07/07/2015
Publication #:
20150347032
Pub Dt:
12/03/2015
Inventors:
Satoshi MURAOKA, Yutaka UEMATSU, Hideki OSAKA, Yuusuke FUKUMURA, Satoru WATANABE et al
Title:
DRAM HAVING SDRAM INTERFACE AND FLASH MEMORY CONSOLIDATED MEMORY MODULE
Assignment: 1
Reel/Frame:
036110/0075Recorded: 07/16/2015Pages: 16
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
MURAOKA, SATOSHI
Exec Dt:
05/15/2015
UEMATSU, YUTAKA
Exec Dt:
05/15/2015
OSAKA, HIDEKI
Exec Dt:
05/16/2015
FUKUMURA, YUUSUKE
Exec Dt:
05/18/2015
WATANABE, SATORU
Exec Dt:
05/18/2015
SHIBATA, MASABUMI
Exec Dt:
05/19/2015
KAKITA, HIROSHI
Exec Dt:
05/20/2015
FUKUDA, YUICHI
Exec Dt:
05/18/2015
MIYAGAWA, TAKASHI
Exec Dt:
05/15/2015
NAITO, MICHINORI
Exec Dt:
05/18/2015
UENO, HITOSHI
Exec Dt:
06/17/2015
IDEI, AKIO
Exec Dt:
05/15/2015
ONO, TAKAYUKI
Exec Dt:
05/15/2015
SUMIKURA, TAISHI
Exec Dt:
05/15/2015
Assignee:
HITACHI, LTD.
6-6, MARUNOUCHI 1-CHOME, CHIYODA-KU
TOKYO, JAPAN 100-8280
Correspondent:
MITCHELL W. SHAPIRO
MILES & STOCKBRIDGE P.C.
1751 PINNACLE DRIVE, SUITE 1500
TYSONS CORNER, VA 22102-3833

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