Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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08/29/2017
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Application #:
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14905406
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Filing Dt:
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01/15/2016
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Publication #:
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Pub Dt:
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06/02/2016
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Inventor:
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Tadahiro KURODA
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Title:
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INTEGRATED CIRCUIT AND LAYERED CIRCUIT PROVIDED THEREWITH
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 15-45, MITA 2-CHOME, MINATO-KU, |
| TOKYO, JAPAN 108-8345 |
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| IPUSA, P.L.L.C |
| 1054 31ST STREET, N.W. |
| SUITE 400 |
| WASHINGTON, DC 20007 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-11 KANDA OGAWAMACHI, CHIYODA-KU |
| TOKYO, JAPAN 101-0052 |
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| IPUSA, P.L.L.C |
| 1054 31ST STREET, N.W. |
| SUITE 400 |
| WASHINGTON, DC 20007 |
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