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Patent Assignment Abstract of Title
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Total Assignments: 3
Patent #:
Issue Dt:
03/28/2017
Application #:
14193272
Filing Dt:
02/28/2014
Publication #:
Pub Dt:
08/18/2016
Inventors:
HAO YANG, HOU GANG LI, CHENG WEI SONG, FAN ZHOU, YUFEI LI
Title:
LATENCY REDUCED ERROR CORRECTION SCHEME WITH ERROR INDICATION¿FUNCTION FOR BURST ERROR CORRECTION CODES
Assignment: 1
Reel/Frame:
032460/0564Recorded: 03/18/2014Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
02/24/2014
Exec Dt:
02/24/2014
Exec Dt:
02/25/2014
Exec Dt:
02/24/2014
Exec Dt:
02/24/2014
Assignee:
NEW ORCHARD ROAD
ARMONK, NEW YORK 10504
Correspondent:
IBM MICROELECTRONICS INTELLECTUAL
1000 RIVER STREET
972 E
ESSEX JUNCTION, VT 05452
Assignment: 2
Reel/Frame:
040992/0714Recorded: 01/17/2017Pages: 12
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
01/12/2017
Exec Dt:
12/16/2016
Exec Dt:
12/16/2016
Exec Dt:
01/08/2017
Exec Dt:
12/16/2016
Assignee:
NEW ORCHARD ROAD
ARMONK, NEW YORK 10504
Correspondent:
ANDREW M. CALDERON
7918 JONES BRANCH DRIVE, SUITE 500
MCLEAN, VA 22102
Assignment: 3
Reel/Frame:
041895/0026Recorded: 03/06/2017Pages: 14
Conveyance:
CORRECTIVE ASSIGNMENT TO CORRECT THE LAST NAME OF THE INVENTOR HAO YANG PREVIOUSLY RECORDED ON REEL 040992 FRAME 0714. ASSIGNOR(S) HEREBY CONFIRMS THE LAST NAME OF THE INVENTOR HAO YANG WAS NOTED INCORRECTLY.
Assignors:
Exec Dt:
01/12/2017
Exec Dt:
12/16/2016
Exec Dt:
12/16/2016
Exec Dt:
01/08/2017
Exec Dt:
12/16/2016
Assignee:
NEW ORCHARD ROAD
ARMONK, NEW YORK 10504
Correspondent:
ANDREW M. CALDERON
7918 JONES BRANCH DRIVE, SUITE 500
MCLEAN, VA 22102

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