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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
9679658
Issue Dt:
06/13/2017
Application #:
14752817
Filing Dt:
06/26/2015
Publication #:
20160379715
Pub Dt:
12/29/2016
Inventors:
Yogesh B. WAKCHAURE, Paul D. RUBY, Joseph F. DOLLER, David J. PELSTER, Xin GUO et al
Title:
METHOD AND APPARATUS FOR REDUCING READ LATENCY FOR A BLOCK ERASABLE NON-VOLATILE MEMORY
Assignment: 1
Reel/Frame:
036525/0290Recorded: 09/09/2015Pages: 16
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
PELSTER, DAVID J.
Exec Dt:
07/07/2015
WAKCHAURE, YOGESH B.
Exec Dt:
08/31/2015
GUO, XIN
Exec Dt:
07/08/2015
RUBY, PAUL D.
Exec Dt:
08/11/2015
DAYACAP, JUSTIN R.
Exec Dt:
07/15/2015
DOLLER, JOSEPH F.
Exec Dt:
08/24/2015
FRICKEY, ROBERT E., III
Exec Dt:
08/10/2015
Assignee:
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD
SANTA CLARA, CALIFORNIA 95054
Correspondent:
KONRAD RAYNES DAVDA & VICTOR LLP
350 S. BEVERLY DR.
SUITE 360
BEVERLY HILLS, CA 90212
Assignment: 2
Reel/Frame:
062437/0255Recorded: 01/19/2023Pages: 47
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
INTEL CORPORATION
Exec Dt:
12/29/2021
Assignee:
SK HYNIX NAND PRODUCT SOLUTIONS CORP.
3101 N. 1ST STREET
SAN JOSE, CALIFORNIA 95134
Correspondent:
BYRNE POH LLP
400 RELLA BLVD
STE 165 #106
SUFFERN, NY 10901

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