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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
03/14/2017
Application #:
14867463
Filing Dt:
09/28/2015
Publication #:
Pub Dt:
03/30/2017
Inventor:
Dinesh PATIL
Title:
MULTI-LEVEL SIGNALING FOR ON-PACKAGE CHIP-TO-CHIP INTERCONNECT THROUGH SILICON BRIDGE
Assignment: 1
Reel/Frame:
036789/0768Recorded: 10/14/2015Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
09/25/2015
Assignee:
101 INNOVATION DRIVE
SAN JOSE, CALIFORNIA 95134
Correspondent:
OKAMOTO & BENEDICTO LLP
P.O. BOX 641330
SAN JOSE, CA 95164-1330

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