Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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05/26/2020
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Application #:
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15428727
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Filing Dt:
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02/09/2017
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Publication #:
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Pub Dt:
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08/17/2017
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Inventors:
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Byung-Hyun Lee, Yang-Kyu Choi, Min-Ho Kang
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Title:
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JUNCTIONLESS TRANSISTOR BASED ON VERTICALLY INTEGRATED GATE-ALL-ROUND MULTIPLE NANOWIRE CHANNELS AND METHOD OF MANUFACTURING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 291, DAEHAK-RO, YUSEONG-GU |
| DAEJEON, KOREA, REPUBLIC OF 34141 |
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| JEFF LLOYD |
| P.O. BOX 142950 |
| GAINESVILLE, FL 32614-2950 |
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