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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
10339242
Issue Dt:
07/02/2019
Application #:
15622805
Filing Dt:
06/14/2017
Publication #:
20170364610
Pub Dt:
12/21/2017
Inventors:
Takumi UEZONO, Tadanobu TOBA, Yusuke KANNO, Masahiro SHIRAISHI, Hideo HARADA et al
Title:
Semiconductor LSI Design Device and Design Method
Assignment: 1
Reel/Frame:
042719/0315Recorded: 06/15/2017Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
UEZONO, TAKUMI
Exec Dt:
04/24/2017
TOBA, TADANOBU
Exec Dt:
04/24/2017
KANNO, YUSUKE
Exec Dt:
05/16/2017
SHIRAISHI, MASAHIRO
Exec Dt:
04/26/2017
HARADA, HIDEO
Exec Dt:
04/26/2017
NISHIKAWA, SATOSHI
Exec Dt:
04/26/2017
MOTOYA, TORU
Exec Dt:
04/25/2017
Assignee:
HITACHI, LTD.
6-6, MARUNOUCHI 1-CHOME
CHIYODA-KU, TOKYO, JAPAN
Correspondent:
CROWELL & MORING LLP
1001 PENNSYLVANIA AVENUE, N.W.
WASHINGTON, DC 20004

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