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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
10/02/2018
Application #:
15700319
Filing Dt:
09/11/2017
Publication #:
Pub Dt:
05/31/2018
Inventors:
Yinghao HO, Shinichi YASUDA
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT WITH RESISTIVE CHANGE ELEMENTS INTERSECT WITH FIRST AND SECOND PLURALITY WIRING LINES, CONTROL CIRCUIT AND PLURALITY OF CURRENT LIMITER CIRCUITS CORRESPONDING TO THE FIRST AND SECOND WIRING LINES
Assignment: 1
Reel/Frame:
043696/0621Recorded: 09/26/2017Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
09/14/2017
Exec Dt:
09/14/2017
Assignee:
1-1, SHIBAURA 1-CHOME, MINATO-KU
TOKYO, JAPAN
Correspondent:
FINNEGAN, HENDERSON
901 NEW YORK AVENUE, NW
WASHINGTON, DC 20001

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