Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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15824792
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Filing Dt:
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11/28/2017
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Publication #:
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Pub Dt:
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06/21/2018
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Inventor:
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Thomas E. Harrington III
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Title:
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Source-Gate Region Architecture in a Vertical Power Semiconductor Device
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 15050 E. BELTWOOD PARKWAY |
| ADDISON, TEXAS 75001 |
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| CARRINGTON, COLEMAN, SLOMAN & BLUMENTHAL |
| 901 MAIN STREET, SUITE 5500 |
| DALLAS, TX 75202 |
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