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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
08/13/2019
Application #:
15984586
Filing Dt:
05/21/2018
Publication #:
Pub Dt:
09/27/2018
Inventors:
Jeffrey L. Libbert, Andrew Marquis Jones, Horacio Josue Mendez et al
Title:
METHOD OF MANUFACTURING HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR WAFERS WITH CHARGE TRAPPING LAYERS
Assignment: 1
Reel/Frame:
045858/0733Recorded: 05/21/2018Pages: 13
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
01/16/2015
Exec Dt:
12/16/2014
Exec Dt:
12/11/2014
Exec Dt:
12/16/2014
Exec Dt:
12/15/2014
Exec Dt:
01/24/2015
Exec Dt:
12/16/2014
Exec Dt:
12/16/2014
Assignee:
9 BATTERY ROAD
#15-01, STRAITS TRADING BUILDING
SINGAPORE, SINGAPORE 049910
Correspondent:
RICHARD A. SCHUTH (SUNEDISON) ARMSTRONG
7700 FORSYTH BOULEVARD
SUITE 1800
ST. LOUIS, MO 63105
Assignment: 2
Reel/Frame:
048051/0011Recorded: 01/17/2019Pages: 9
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
06/06/2018
Exec Dt:
06/06/2018
Exec Dt:
06/06/2018
Assignee:
NO. 8. INDUSTRIAL EAST ROAD
SCIENCE-BASED INDUSTRIAL PARK
HSINCHU, TAIWAN R.O.C.
Correspondent:
RICHARD A. SCHUTH
ARMSTRONG TEASDALE LLP
7700 FORSYTH BLVD., SUITE 1800
ST. LOUIS, MO 63105

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