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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
09/22/2020
Application #:
16132804
Filing Dt:
09/17/2018
Publication #:
Pub Dt:
10/31/2019
Inventors:
Shu-Yi KAO, Yu-Lan Lo, Meng-Jung Lee, Yun-Jing Lin
Title:
CIRCUIT DESIGN SYSTEM, CHECKING METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM THEREOF
Assignment: 1
Reel/Frame:
046888/0748Recorded: 09/17/2018Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
09/11/2018
Exec Dt:
09/11/2018
Exec Dt:
09/11/2018
Exec Dt:
09/11/2018
Assignee:
NO. 2, INNOVATION ROAD II, HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 300
Correspondent:
LOCKE LORD LLP
P.O. BOX 55874
BOSTON, MA 02205

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