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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
12/08/2020
Application #:
16721255
Filing Dt:
12/19/2019
Publication #:
Pub Dt:
04/23/2020
Inventors:
Cheng Hsiao, Juan Yi Chen, Chung-Kai Lin, Min-Chie Jeng, Katherine Chiang, Chang-Yu Huang et al
Title:
Method and System for Integrated Circuit Design With On-Chip Variation and Spatial Correlation
Assignment: 1
Reel/Frame:
052843/0988Recorded: 06/04/2020Pages: 6
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
07/12/2016
Exec Dt:
07/12/2016
Exec Dt:
07/12/2016
Exec Dt:
07/12/2016
Exec Dt:
07/12/2016
Exec Dt:
07/18/2016
Exec Dt:
07/12/2016
Exec Dt:
07/18/2016
Assignee:
8, LI-HSIN RD. 6
HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 300-78
Correspondent:
HAYNES AND BOONE, LLP (24061) IP SECTION
2323 VICTORY AVENUE
SUITE 700
DALLAS, TX 75219

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