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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
11340292
Issue Dt:
05/24/2022
Application #:
16506264
Filing Dt:
07/09/2019
Publication #:
20210011080
Pub Dt:
01/14/2021
Inventors:
Rajesh Narwal, Venkata Narayanan Srinivasan, Srinivas Dhulipalla
Title:
System and Method for Parallel Testing of Electronic Device
Assignment: 1
Reel/Frame:
049701/0199Recorded: 07/09/2019Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
NARWAL, RAJESH
Exec Dt:
06/25/2019
SRINIVASAN, VENKATA NARAYANAN
Exec Dt:
06/25/2019
DHULIPALLA, SRINIVAS
Exec Dt:
06/25/2019
Assignee:
STMICROELECTRONICS INTERNATIONAL N.V.
39, CHEMIN DU CHAMP-DES-FILLES
PLAN-LES-OUATES
GENEVA, SWAZILAND 1228
Correspondent:
SLATER MATSIL, LLP
17950 PRESTON RD.
SUITE 1000
DALLAS, TX 75252
Assignment: 2
Reel/Frame:
049731/0403Recorded: 07/11/2019Pages: 8
Conveyance:
CORRECTIVE ASSIGNMENT TO CORRECT THE STATE/COUNTRY CODE FOR RECEIVING PARTY ADDRESS PREVIOUSLY RECORDED AT REEL: 48701 FRAME: 199. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Assignors:
NARWAL, RAJESH
Exec Dt:
06/25/2019
SRINIVASAN, VENKATA NARAYANAN
Exec Dt:
06/25/2019
DHULIPALLA, SRINIVAS
Exec Dt:
06/25/2019
Assignee:
STMICROELECTRONICS INTERNATIONAL N.V.
39, CHEMIN DU CHAMP-DES-FILLES
PLAN-LES-OUATES, SWITZERLAND 1228
Correspondent:
SLATER MATSIL, LLP
17950 PRESTON RD.
SUITE 1000
DALLAS, TX 75252

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