Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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16953241
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Filing Dt:
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11/19/2020
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Publication #:
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Pub Dt:
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05/27/2021
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Inventors:
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Vikas AGRAWAL, Feng QIU, Cheng Wen HSIAO, Yimu GUO
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Title:
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TIME-DELAY CIRCUIT FOR A DIGITAL SIGNAL, PARTICULARLY FOR A CLOCK SIGNAL
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1001 MURPHY RANCH ROAD |
| MILPITAS, CALIFORNIA 95035 |
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| HAYNES AND BOONE, LLP (IP SECTION) |
| 2323 VICTORY AVENUE, SUITE 700 |
| DALLAS, TX 75219 |
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05/06/2024 10:54 PM
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