Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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06/28/2022
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Application #:
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17129849
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Filing Dt:
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12/21/2020
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Publication #:
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Pub Dt:
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07/01/2021
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Inventors:
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Robert Menezes, Rajeev Kumar Dokania, Ramamoorthy Ramesh, Sasikanth Manipatruni et al
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Title:
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LINEAR INPUT AND NON-LINEAR OUTPUT THRESHOLD LOGIC GATE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 180 STEUART STREET |
| #19254 |
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| MUGHAL IP P.C. |
| 1500 NW BETHANY BLVD. |
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| BEAVERTON, OR 97006 |
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