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Patent Assignment Abstract of Title

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Total Assignments: 2

Patent #:	NONE	Issue Dt:		Application #:	18349448	Filing Dt:	07/10/2023
Publication #:	20230352554	Pub Dt:	11/02/2023
Inventors:	Yen-Ting Chen, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
Title:	INTEGRATED CIRCUIT WITH SIDEWALL SPACERS FOR GATE STACKS

Assignment: 1

Reel/Frame:

066535/0682

Recorded: 02/22/2024

Pages: 4

Conveyance:

ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Assignors:

CHEN, YEN-TING

Exec Dt:

01/12/2018

LEE, WEI-YANG

Exec Dt:

01/12/2018

YANG, FENG-CHENG

Exec Dt:

01/12/2018

CHEN, YEN-MING

Exec Dt:

01/12/2018

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

8, LI-HSIN RD 6

HSINCHU SCIENCE PARK

HSINCHU, TAIWAN 300-78

Correspondent:

KYLE L. HOWARD

2801 N. HARWOOD ST.

SUITE 2300

DALLAS, TX 75201

Assignment: 2

Reel/Frame:

066989/0809

Recorded: 02/27/2024

Pages: 7

Conveyance:

CORRECTIVE ASSIGNMENT TO CORRECT THE DOCKET NUMBER FROM 2013-1754/24061.2740US06 TO 2017-0821/24061.3585USO4 PREVIOUSLY RECORDED AT REEL: 66535 FRAME: 682. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.

Assignors:

CHEN, YEN-TING

Exec Dt:

01/12/2018