Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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18357220
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Filing Dt:
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07/24/2023
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Publication #:
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Pub Dt:
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11/09/2023
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Inventors:
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Tseng Chin Lo, Bo-Sen Chang, Yueh-Yi Chen, Chih-Ting Sun, Ying-Jung Chen, Kung-Cheng Lin et al
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Title:
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Integrated Circuit Overlay Test Patterns And Method Thereof
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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8, LI-HSIN RD. 6 |
HSINCHU SCIENCE PARK |
HSINCHU, TAIWAN 300-78 |
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HAYNES AND BOONE, LLP (24061) IP SECTION |
2323 VICTORY AVENUE |
SUITE 700 |
DALLAS, TX 75219 |
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05/14/2024 10:16 PM
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