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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
NONE
Issue Dt:
Application #:
18315643
Filing Dt:
05/11/2023
Publication #:
Pub Dt:
11/23/2023
Inventors:
Chien-Tzu KO, Jiun-Jang LIN, Yong-Hong HUANG, Jhen-Yu LI, Tsung-Wei HUANG, Sheng-Kai FAN
Title:
REDUCING OUTPUT RIPPLE VOLTAGE OF MULTIPLE SWITCHED CAPACITOR CIRCUITS BY REDUCING OVERLAPPING OF DEAD TIME
Assignment: 1
Reel/Frame:
063611/0078Recorded: 05/11/2023Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
03/07/2023
Exec Dt:
03/07/2023
Exec Dt:
03/07/2023
Exec Dt:
03/07/2023
Exec Dt:
03/07/2023
Exec Dt:
03/07/2023
Assignee:
14F-1, NO.8, TAIYUEN 1ST ST.
ZHUBEI CITY, HSINCHU COUNTY, TAIWAN 30288
Correspondent:
MCCLURE, QUALEY & RODACK LLP
280 INTERSTATE NORTH CIRCLE
SUITE 530
ATLANTA, GA 30339

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